Electronic Design Automation for Integrated Circuits Handbook, Second Edition - Two Volume Set
Produktdetaljer
Biographical note
Luciano Lavagno received his PhD in electrical engineering and computer sciences from the University of California, Berkeley, USA (UC Berkeley), in 1992, and from Politecnico di Torino, Italy, in 1993. He is a coauthor of two books on asynchronous circuit design, a book on hardware/software codesign of embedded systems, more than 200 scientific papers, and 12 US patents. Between 1993 and 2000, he was the architect of the POLIS project, a cooperation between UC Berkeley, Cadence Design Systems, Magneti Marelli, and Politecnico di Torino, which developed a complete hardware/software codesign environment for control-dominated embedded systems. Between 2003 and 2014, he was one of the creators and architects of the Cadence C-to-Silicon high-level synthesis system. Since 2011, he has been a full professor with Politecnico di Torino. He has been serving on the technical committees of several international conferences, workshops, and symposia. He has been the technical program chair of the Design Automation Conference, and the technical program committee and general chair of the International Conference on Hardware/Software Codesign and System Synthesis. He has been an associate editor of the Institute of Electrical and Electronics Engineers (IEEE) Transactions on Circuits and Systems and Association for Computing Machinery (ACM) Transactions on Embedded Computing. He is a senior member of the IEEE. His research interests include the synthesis of asynchronous low-power circuits, the concurrent design of mixed hardware and software embedded systems, the high-level synthesis of digital circuits, the design and optimization of hardware components and protocols for wireless sensor networks (WSNs), and design tools for WSNs.
Igor L. Markov is currently on leave from the University of Michigan, Ann Arbor, USA, where he taught for many years. He joined Google in 2014 and occasionally teaches very-large-scale integration design at Stanford University, California, USA. He researches computers that make computers, including algorithms and optimization techniques for electronic design automation, secure hardware, and emerging technologies. He is an Institute of Electrical and Electronics Engineers (IEEE) fellow and an Association for Computing Machinery (ACM) distinguished scientist. He has coauthored five books, and has four U.S. patents and more than 200 refereed publications, some of which were honored by best-paper awards. Professor Markov is a recipient of the Design Automation Conference Fellowship, ACM Special Interest Group on Design Automation Outstanding New Faculty Award, National Science Foundation Faculty Early Career Development Program Award, IBM Partnership Award, Microsoft A. Richard Newton Breakthrough Research Award, and IEEE Council on Electronic Design Automation Early Career Award. During the 2011 redesign of the ACM Computing Classification System, Professor Markov led the effort on the hardware tree. Twelve doctoral dissertations were defended under his supervision; three of which received outstanding dissertation awards.
Grant E. Martin is a distinguished engineer at Cadence Design Systems, Inc., San Jose, California, USA. Before that, Grant worked for Burroughs in Scotland for 6 years; Nortel/Bell-Northern Research in Canada for 10 years; Cadence Design Systems for 9 years, eventually becoming a fellow in their labs; and Tensilica for 9 years. He rejoined Cadence in 2013 when it acquired Tensilica, and has been there since, working in the Tensilica part of the Cadence Intellectual Property Group. He received his bachelor’s and master’s degrees in mathematics (combinatorics and optimization) from the University of Waterloo, Ontario, Canada, in 1977 and 1978. Grant has coauthored and coedited several books, including the first-ever book on system-on-chip (SoC) design published in Russian. He has also presented many papers, talks, and tutorials, and participated in panels at a number of major conferences. He cochaired the VSI Alliance Embedded Systems Study Group in the summer of 2001, and was cochair of the Design Automation Conference Technical Program Committee for Methods for 2005 and 2006. He is also a coeditor of the Springer Embedded Systems series. His particular areas of interest include system-level design, intellectual property-based design of SoC, platform-based design, digital signal processing, baseband and image processing, and embedded software. He is a senior member of the Institute of Electrical and Electronics Engineers.
Louis K. Scheffer received his BS and MS from the California Institute of Technology, Pasadena, USA, in 1974 and 1975, and his PhD from Stanford University, California, USA, in 1984. He worked at Hewlett Packard from 1975 to 1981 as a chip designer and computer-aided design tool developer. In 1981, he joined Valid Logic Systems, where he did hardware design, developed a schematic editor, and built an integrated circuit layout, routing, and verification system. In 1991, Valid merged with Cadence Design Systems, after which Dr. Scheffer worked on place and route, floorplanning systems, and signal integrity issues until 2008. In 2008, Dr. Scheffer switched fields to neurobiology, studying the structure and function of the brain by using electron microscope images to reconstruct its circuits. He is currently affiliated with the Howard Hughes Medical Institute, Ashburn, Virginia, USA. As electronic design automation (EDA) is no longer his daily staple (though his research uses a number of algorithms derived from EDA), he is extremely grateful to Igor Markov for taking on this portion of these books. Lou is also interested in the Search for Extraterrestrial Intelligence (SETI), serves on the technical advisory board for the Allen Telescope Array at the SETI Institute, and has coauthored the book SETI-2020, in addition to several technical articles in the field.
<p>"… contains the most up-to-date nuts and bolts of the front-end and back-end design automations. … covers every single EDA aspect imaginable in vivid detail. … This book will be very useful for master’s and PhD students who are doing their theses in IC design. … This is by far the most comprehensive book on EDA in the market. Every IC design company should purchase this book as a reference for their engineers."<br />—<em>Faisal Mohd-Yasin, Griffith University, Queensland, Australia</em></p><p>"… comprehensive coverage of all aspects of algorithms and EDA tools for modern VLSI design, starting from system design to GDSII tape out, including testing. ... Practicing engineers and graduate and undergraduate students will find these two volumes to be sources of extensive knowledge. … This book is well written with in-depth explanation of basic concepts as well as advanced topics."<br />—<em>Dr. Soumya Pandit, Institute of Radio Physics and Electronics, University of Calcutta, India</em></p><p>"…The depth and complexity of each domain and sub field within the scope of EDA is hard to grasp. People working at one end of the design spectrum rarely deeply understand the other end. As a technology writer and analyst, I often must pull from a wide range of information about EDA technology. I was pleasantly surprised when I heard from Grant Martin, an old time co-worker from when I was at Cadence. He asked me to look over the latest edition of the Electronic Design Automation Handbook for IC System Design, Verification, and Testing. It is published by the CRC Press. As he had warned me, this two-volume set is a weighty tome. Yet, this set does an impressive job of covering the field broadly and yet deeply.<br />It was originally published 10 years ago in 2006. Grant was one of the editors who marshalled the major update for 2016. There are over 40 technical contributors, who have written detailed technical articles on just about every corner of the chip design process. The first volume focuses on front end designed such as language based design, architecture specification, and higher levels of abstraction. Indeed, many of the updates to the handbook address changes in system specification and high level verification that have occurred over the last 10 years. The second even more substantial volume deals with everything from synthesis and schematic capture to lithography.<br />I decided to read up in the second volume on one of the topics that I had recently written about. Before I write an article I usually do background research to make sure that the technical points are properly covered. It’s pretty clear that had I referred to the handbook, it would have been much easier to pull together the detailed background information to help write a more informed piece. The content is well written and goes down to bedrock when it comes to the underlying theory and principles. As such it would be a very useful source of information for someone who wants to gain greater knowledge of the topics adjacent to their expertise.<br />I know we live in an age where books are being supplanted by online information. However, digging into a topic online often results in scattershot information. This handbook has even and thorough information. It is likely to remain close to my keyboard as a resource for future articles."<br />—<em>Tom Simon, SemiWiki.com,</em> https://www.semiwiki.com/forum/content/6725-how-far-has-design-automation-brought-us.html</p><p>"It was a great pleasure to sit down recently with Grant Martin – Distinguished Engineer in the Tensilica R&D/IP Group at Cadence – to discuss the 2nd edition of the 2-book compendium he is so closely associated with:<br /><i>Volume 1: Electronic Design Automation for IC System Design, Verification, and Testing<br />Volume 2: Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology.</i><br />The topic material is so comprehensive, the list of chapter authors so astounding, the sheer volume of journal and conference papers referenced at the end of each chapter so complete.<br />And now as I write this – as I look again through these books, marvel at the vast scope of the technology involved in chip design and manufacturing, and the number of people who have contributed their ideas and history to the development of these ideas – I am struck again by the profound and heroic nature of this effort.<br />This is distinctly the idea that comes to mind in looking at these books. Here, in these two books, resides that level of knowledge. This is an encyclopedic place, one that would be a starting point for anyone who wants to understand EDA.<br />Good training. Great imagination. Great intelligence. Great stamina. Great dignity. It’s all there in these books. You should own a set. And you should read them."<br />–<em>Peggy Aycinena, freelance journalist and Editor of EDA Confidential</em> at www.aycinena.com. https://www10.edacafe.com/blogs/whatwouldjoedo/2017/07/13/martin-lavagno-scheffer-markov-assembling-a-mighty-tome-for-the-ages/ </p><p><strong> <br /></strong></p><p><strong>Praise for the Previous Edition</strong></p><p><strong>"These books represent the state of the art as it existed in 2005 and early 2006. These are the techniques in use today and are the bases for future developments."<br /><em>—Books-On-Line</em></strong></p><p><strong>"Every design group should have a copy of this handbook in its library. It is an excellent reference text. It can also serve as outstanding background reading for new engineers exposed to some of these areas for the first time. The material here is better organized and better written than what could be found on the web. Putting together such a high-quality, substantive work is quite an achievement."<br />—<em>IEEE Design & Test of Computers</em>, September-October 2006</strong></p><p><strong>"Comprising the work of expert contributors guided by leaders in the field, this handbook is an indispensable resource for EDA tool developers; electronics designers and engineers using EDA tools; students and faculty in electrical engineering, computer science, and computer engineering courses; companies that develop EDA tools and companies that design and build integrated circuits; and embedded system and software developers in system product and software companies."<br />—<em>IEEE Industrial Electronics Society Newsletter</em>, Vol. 54, No. 2, 2006</strong></p>
Produktdetaljer
Biographical note
Luciano Lavagno received his PhD in electrical engineering and computer sciences from the University of California, Berkeley, USA (UC Berkeley), in 1992, and from Politecnico di Torino, Italy, in 1993. He is a coauthor of two books on asynchronous circuit design, a book on hardware/software codesign of embedded systems, more than 200 scientific papers, and 12 US patents. Between 1993 and 2000, he was the architect of the POLIS project, a cooperation between UC Berkeley, Cadence Design Systems, Magneti Marelli, and Politecnico di Torino, which developed a complete hardware/software codesign environment for control-dominated embedded systems. Between 2003 and 2014, he was one of the creators and architects of the Cadence C-to-Silicon high-level synthesis system. Since 2011, he has been a full professor with Politecnico di Torino. He has been serving on the technical committees of several international conferences, workshops, and symposia. He has been the technical program chair of the Design Automation Conference, and the technical program committee and general chair of the International Conference on Hardware/Software Codesign and System Synthesis. He has been an associate editor of the Institute of Electrical and Electronics Engineers (IEEE) Transactions on Circuits and Systems and Association for Computing Machinery (ACM) Transactions on Embedded Computing. He is a senior member of the IEEE. His research interests include the synthesis of asynchronous low-power circuits, the concurrent design of mixed hardware and software embedded systems, the high-level synthesis of digital circuits, the design and optimization of hardware components and protocols for wireless sensor networks (WSNs), and design tools for WSNs.
Igor L. Markov is currently on leave from the University of Michigan, Ann Arbor, USA, where he taught for many years. He joined Google in 2014 and occasionally teaches very-large-scale integration design at Stanford University, California, USA. He researches computers that make computers, including algorithms and optimization techniques for electronic design automation, secure hardware, and emerging technologies. He is an Institute of Electrical and Electronics Engineers (IEEE) fellow and an Association for Computing Machinery (ACM) distinguished scientist. He has coauthored five books, and has four U.S. patents and more than 200 refereed publications, some of which were honored by best-paper awards. Professor Markov is a recipient of the Design Automation Conference Fellowship, ACM Special Interest Group on Design Automation Outstanding New Faculty Award, National Science Foundation Faculty Early Career Development Program Award, IBM Partnership Award, Microsoft A. Richard Newton Breakthrough Research Award, and IEEE Council on Electronic Design Automation Early Career Award. During the 2011 redesign of the ACM Computing Classification System, Professor Markov led the effort on the hardware tree. Twelve doctoral dissertations were defended under his supervision; three of which received outstanding dissertation awards.
Grant E. Martin is a distinguished engineer at Cadence Design Systems, Inc., San Jose, California, USA. Before that, Grant worked for Burroughs in Scotland for 6 years; Nortel/Bell-Northern Research in Canada for 10 years; Cadence Design Systems for 9 years, eventually becoming a fellow in their labs; and Tensilica for 9 years. He rejoined Cadence in 2013 when it acquired Tensilica, and has been there since, working in the Tensilica part of the Cadence Intellectual Property Group. He received his bachelor’s and master’s degrees in mathematics (combinatorics and optimization) from the University of Waterloo, Ontario, Canada, in 1977 and 1978. Grant has coauthored and coedited several books, including the first-ever book on system-on-chip (SoC) design published in Russian. He has also presented many papers, talks, and tutorials, and participated in panels at a number of major conferences. He cochaired the VSI Alliance Embedded Systems Study Group in the summer of 2001, and was cochair of the Design Automation Conference Technical Program Committee for Methods for 2005 and 2006. He is also a coeditor of the Springer Embedded Systems series. His particular areas of interest include system-level design, intellectual property-based design of SoC, platform-based design, digital signal processing, baseband and image processing, and embedded software. He is a senior member of the Institute of Electrical and Electronics Engineers.
Louis K. Scheffer received his BS and MS from the California Institute of Technology, Pasadena, USA, in 1974 and 1975, and his PhD from Stanford University, California, USA, in 1984. He worked at Hewlett Packard from 1975 to 1981 as a chip designer and computer-aided design tool developer. In 1981, he joined Valid Logic Systems, where he did hardware design, developed a schematic editor, and built an integrated circuit layout, routing, and verification system. In 1991, Valid merged with Cadence Design Systems, after which Dr. Scheffer worked on place and route, floorplanning systems, and signal integrity issues until 2008. In 2008, Dr. Scheffer switched fields to neurobiology, studying the structure and function of the brain by using electron microscope images to reconstruct its circuits. He is currently affiliated with the Howard Hughes Medical Institute, Ashburn, Virginia, USA. As electronic design automation (EDA) is no longer his daily staple (though his research uses a number of algorithms derived from EDA), he is extremely grateful to Igor Markov for taking on this portion of these books. Lou is also interested in the Search for Extraterrestrial Intelligence (SETI), serves on the technical advisory board for the Allen Telescope Array at the SETI Institute, and has coauthored the book SETI-2020, in addition to several technical articles in the field.